ORNL’s Inverter Redesign Cuts Voltage Stress 90% Without New Parts: the real signal is the immediate adjustment required in cash, risk, and execution

The Number That Leads

Oak Ridge National Laboratory’s National Transportation Research Center published results in July 2026 showing a 90 percent reduction in neutral-point voltage fluctuations and a 43 percent drop in capacitor current stress within a new multi-level inverter drive architecture. The results come from simulation-stage testing, and the primary design target is large electric propulsion: aircraft, marine vessels, and heavy-duty trucks. No additional hardware was required. The mechanism is structural, not additive.

These numbers describe the suppression of two well-documented failure modes in high-voltage, high-power inverter systems: neutral-point current imbalance and common-mode voltage. Both generate excess heat, cause premature capacitor degradation, and force engineers to oversize components as a thermal buffer. Eliminating them at the architectural level — rather than compensating with filtering hardware or derating — represents a different engineering posture than the current industry norm.

What Sits Behind the Number

The design pairs two active neutral-point clamped (ANPC) inverters operating in inverse synchronization. Each inverter drives a separate set of multi-phase motor windings, but one set is physically reversed in direction during the winding process itself. This is not a software reversal or a termination swap — the coil geometry is mirrored.

Because the winding sets are physically opposite, the second inverter is programmed to supply a reference voltage vector with exactly opposite electrical polarity to the first. The constructive combination of opposing magnetic flux preserves full torque output. At the same time, stray common-mode voltages and neutral-point currents from the two inverter units arrive in counter-phase and cancel at the system level. Under ideal operating conditions, this produces zero total common-mode voltage and zero net neutral-point current — without any external filter, control-loop modification, or supplementary component.

The control implementation uses carrier-based space vector modulation, with the secondary inverter’s triangular carrier signal phase-shifted by 180 degrees relative to the primary unit. This keeps computational load low enough for standard industrial control platforms. As ORNL researcher Gui-Jia Su stated in the project release:

What This Is Worth in Your Operation

The source research targets electric aircraft and heavy transport, not data center infrastructure, and no validated deployment in grid-scale or data center applications has been confirmed. That boundary matters and should not be papered over.

The technical parallel, however, is real: multi-level ANPC inverter topologies are already embedded in large uninterruptible power supply systems and grid-scale battery energy storage systems. The neutral-point voltage imbalance and common-mode voltage problems this architecture addresses are not unique to electric drivetrains — they occur in any high-voltage, high-power inverter application. Data center UPS and BESS installations at tens of megawatts face the same thermal stress on DC-link capacitors, the same EMI interference risk, and the same engineering response: oversize the capacitors, add passive filters, or derate the system.

If a no-hardware, winding-geometry-based cancellation approach were validated at equivalent power levels in stationary power applications, the consequences would be meaningful. Smaller inverter assemblies reduce footprint in constrained power rooms. Lower capacitor thermal stress extends service life in systems that run continuously. Reduced EMI lowers shielding requirements near sensitive IT infrastructure. None of these outcomes are confirmed for data center applications — but the technical lineage connects directly enough to warrant tracking this research through its next development stages.

The immediate operating relevance is narrow: procurement and infrastructure teams evaluating next-generation UPS platforms or BESS system designs should ask their inverter vendors whether ANPC multi-level topologies with system-level cancellation approaches are in their roadmap, and on what timeline.

What the Data Does Not Say

Several constraints limit direct application of these findings to data center energy decisions. First, all published results are simulation-based. No hardware prototype results have been reported from this ORNL work, and no commercial deployment timeline has been stated. The gap between simulation and field validation in power electronics can be substantial.

Second, the cancellation mechanism achieves theoretical zero common-mode voltage and zero net neutral-point current under ideal conditions. Real operating environments — load transients, grid disturbances, thermal variation — introduce deviations from ideal. How robustly the cancellation holds under non-ideal conditions at sustained high power levels is not confirmed in the source.

Third, the design targets rotating propulsion systems. Stationary power conversion for grid interconnection or UPS applications introduces different duty cycles, fault-response requirements, and grid-code compliance obligations. The winding-reversal method that works in a motor may not translate directly into transformer or filter topologies used in stationary power infrastructure.

Finally, no third-party replication of these results has been cited. The findings originate from a single research group at a government laboratory, and independent validation would be required before procurement specifications could reasonably reference this approach.

The Implementation Question

Given that BESS and UPS vendors are already using multi-level inverter architectures at scale, the concrete question for your next vendor technical review is: what is the current approach to neutral-point voltage management and common-mode voltage suppression in your inverter stack, what component-level compensations does that approach require, and is system-level cancellation — through topology or control — on your development roadmap?

That question costs nothing to ask and positions your team to evaluate inverter architecture choices before the next major BESS procurement cycle, when design decisions will lock in component sizing, thermal management requirements, and long-term maintenance obligations for hardware that will run continuously for a decade or more.


Sources

  • Interestingengineering — US motor cuts internal voltage fluctuations by 90% for electric aircraft (Link)